generated from kenryuS/report-temp
248 lines
11 KiB
TeX
248 lines
11 KiB
TeX
\section{実験手順・条件}
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\subsection{実験器具}
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\begin{itemize}
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\item{ブレッドボード}
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\item{直流安定化電源}
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\item{タクトスイッチ x4}
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\item{LED x4}
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\item{7セグメント LED}
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\item{カーボン抵抗器 $330 \Omega$ or $470 \Omega$ x12}
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\item{ジャンパーワイヤ}
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\item{ANDゲートIC TC74HC08}
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\item{NANDゲートIC HD14012BP}
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\item{ORゲートIC TC74HC32}
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\item{NOTゲートIC TC74HC04}
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\item{7セグメントドライバIC TC4511}
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\item{DフリップフロップIC TC74HC74 x2}
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\item{Nch MOSFET}
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\end{itemize}
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\subsection{課題1-1}
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ANDゲートあるいはORゲートの動作を確認する.
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2つのボタンを入力とし, 出力を7セグメントLEDのドットに表示させる回路を作成する.
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\subsection{課題1-2}
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4入力NANDゲートの動作を確認する.
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4つのボタンを入力とし, 出力を7セグメントLEDのドットに表示させる回路を作成する.
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\subsection{課題1-3}
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\cref{fig:a1-3-cd}に示す組み合わせ回路を作成し動作を確認する.
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4つのボタンを入力とし, 出力を7セグメントLEDのドットに表示させる回路を作成する.
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\begin{figure}[H]
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\centering
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\begin{circuitikz}[scale=0.75]
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\ctikzset{logic ports=ieee}
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\ctikzset{logic ports/scale=0.75}
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\node (A) at (0,2) {$A_{\text{IN}}$};
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\node (B) at (0,1) {$B_{\text{IN}}$};
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\node (C) at (0,0) {$C_{\text{IN}}$};
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\node (D) at (0,-1) {$D_{\text{IN}}$};
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\draw (2,1.5) node[and port](a){};
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\draw (2,-0.5) node[and port](b){};
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\draw (4.5,0.5) node[and port](c){};
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\draw (A) -| (a.in 1) (B) -| (a.in 2);
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\draw (C) -| (b.in 1) (D) -| (b.in 2);
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\draw (a.out) -| (c.in 1) (b.out) -| (c.in 2);
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\draw (c.out) -- ++(0.5,0) node[right] {$D_p$};
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\end{circuitikz}
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\caption{Circuit Diagram of Assignment 1-3}
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\label{fig:a1-3-cd}
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\end{figure}
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\subsection{課題1-4}
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\cref{fig:a1-4-cd}に示す組み合わせ回路を作成し動作を確認する.
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4つのボタンを入力とし, 出力を7セグメントLEDのドットに表示させる回路を作成する.
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\begin{figure}[H]
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\centering
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\begin{circuitikz}[scale=0.75]
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\ctikzset{logic ports=ieee}
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\ctikzset{logic ports/scale=0.75}
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\node (A) at (0,2) {$A_{\text{IN}}$};
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\node (B) at (0,1) {$B_{\text{IN}}$};
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\node (C) at (0,0) {$C_{\text{IN}}$};
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\node (D) at (0,-1) {$D_{\text{IN}}$};
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\draw (2,1.5) node[and port](a){};
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\draw (2,-0.5) node[and port](b){};
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\draw (4.5,0.5) node[and port](c){};
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\draw (6.5,0.5) node[not port](d){};
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\draw (A) -| (a.in 1) (B) -| (a.in 2);
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\draw (C) -| (b.in 1) (D) -| (b.in 2);
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\draw (a.out) -| (c.in 1) (b.out) -| (c.in 2);
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\draw (c.out) -- (d.in);
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\draw (d.out) -- ++(0.5,0) node[right] {$D_p$};
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\end{circuitikz}
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\caption{Circuit Diagram of Assignment 1-4}
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\label{fig:a1-4-cd}
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\end{figure}
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\subsection{課題2-1}
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7セグメントドライバICを用いて1桁のBDCデコーダを作成する.
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\subsection{課題2-2B}
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論理ゲートを複数個使用し, 0-9以外の数の表現を実現する回路を作成する.
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なお, 既存の0-9に対応するBDCコードが入力された際にはセグメントを点灯させないこと.
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\subsection{課題3-1}
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論理ゲートを組み合わせて\cref{fig:a3-1-cd}のRSフリップフロップを作成し, 動作を確認する.
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\begin{figure}[H]
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\centering
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\begin{circuitikz}[scale=0.75]
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\ctikzset{logic ports=ieee}
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\ctikzset{logic ports/scale=0.75}
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\ctikzset{diodes/scale=0.5}
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\ctikzset{resistors/scale=0.5}
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\ctikzset{switches/scale=0.75}
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\node [or port] at (0,1.5) (or1){};
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\node [or port] at (0,-1.5) (or2){};
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\node [not port] at (3,1.5) (not1){};
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\node [not port] at (3,-1.5) (not2){};
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\draw (or1.out) -- (not1.in) (or2.out) -- (not2.in);
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\draw (not1.out) -- ++(1,0) to [short, *-] ++(0,-0.5) coordinate(p1);
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\draw (not2.out) -- ++(1,0) to [short, *-] ++(0,0.5) coordinate(p2);
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\draw (or1.in 2) -- ++(0,-0.5) coordinate (p3);
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\draw (or2.in 1) -- ++(0,0.5) coordinate (p4);
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\draw (p1) -- (p4) (p2) -- (p3);
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\draw ($(not1.out) + (1,0)$) -- ++(4,0) -- ++(0,-2) to[leDo, l={$D_D$}] ++(0,-1) to[R, l={$330 \ \Omega$}] ++(0,-1) node[ground]{};
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\draw ($(not2.out) + (1,0)$) -- ++(1,0) -- ++(0,2) -- ++(1,0) -- ++(0,-1) to[leDo, l={$D_C$}] ++(0,-1) to[R, l={$330 \ \Omega$}] ++(0,-1) node[ground]{};
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\draw (-8,3) node[vcc]{$V_{DD}$} -- ++(0,-1.5) coordinate (v);
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\draw (v) to [normal open switch] ++(4,0) coordinate (in1) -- ++(0.5,0) |- (or1.in 1) (in1) to [short, *-] ++(0,-2) to [leDo, l={$D_B$}] ++(0,-1) to [R, l={$330 \ \Omega$}] ++(0,-1) node[ground]{};
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\draw (v) -- ++(0,-1) to [normal open switch] ++(1.5,0) coordinate (in2) -- ++(0.5,0) -| ($(or2.in 2) + (-0.5,0)$) -- (or2.in 2) (in2) to [short, *-] ++(0,-1) to [leDo, l={$D_A$}] ++(0,-1) to [R, l={$330 \ \Omega$}] ++(0,-1) node[ground]{};
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\end{circuitikz}
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\caption{Circuit Diagram of Assignment 3-1}
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\label{fig:a3-1-cd}
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\end{figure}
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\subsection{課題3-2}
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DフリップフロップICを用いて\cref{fig:a3-2-cd}の回路を作成し, 動作を確認する.
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\begin{figure}[H]
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\centering
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\begin{circuitikz}[scale=0.9]
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\ctikzset{logic ports=ieee}
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\ctikzset{flipflops/scale=0.75}
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\ctikzset{resistors/scale=0.75}
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\ctikzset{diodes/scale=0.75}
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\node [flipflop D] at (0,0) (Df){};
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\draw (-2.5,2) node[vcc]{$V_{DD}$} -- ++(0,-0.5) to[normal open switch] ++(0,-1.5) coordinate(x) to[leDo, l={$D_p$}] ++(0,-2) to[R={$330 \Omega$}] ++(0,-2) node[ground]{};
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\draw (x) to[short,o-] ++(1,0) |- (Df.pin 3);
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\draw (Df.pin 4) -- ++(0.5,0) -- ++(0,2) -- ++(-2.5,0) |- (Df.pin 1);
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\draw (Df.pin 6) -- ++(1.5,0) to[leDo, l={$D_A$}] ++(0,-2.5) to[R={$330 \Omega$}] ++(0,-2) node[ground]{};
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\end{circuitikz}
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\caption{Circuit Diagram of Assignment 3-2}
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\label{fig:a3-2-cd}
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\end{figure}
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\subsection{課題3-3}\label{sec:a3-3}
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DフリップフロップICを2個用いて\cref{fig:a3-3-cd}の順列回路を作成し, 動作を確認する.
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\begin{figure}[H]
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\centering
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\begin{circuitikz}
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\ctikzset{logic ports=ieee}
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\ctikzset{flipflops/scale=0.75}
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\ctikzset{resistors/scale=0.75}
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\ctikzset{diodes/scale=0.75}
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%\ctikzset{multipoles/flipflop/font=\tiny}
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\ctikzset{multipoles/flipflop/pin spacing=0.5}
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\node [flipflop D] at (0,0) (Df0){};
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\node [flipflop D] at (3,0) (Df1){};
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\node [flipflop D] at (6,0) (Df2){};
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\node [flipflop D] at (9,0) (Df3){};
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\draw (-2,2) node[vcc]{$V_{DD}$} to[normal open switch, -*] ++(0,-2) coordinate (x) to[leDo, l_={$D_p$}] ++(0,-1.5) to[R, l_={$330 \Omega$}] ++(0,-1.5) node[ground]{};
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\draw (x) -- ++(0.75,0) |- (Df0.pin 3);
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\draw (Df0.pin 4) -- ++(0.25,0) -- ++(0,2) -- ++(-2.25,0) |- (Df0.pin 1);
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\draw (Df1.pin 4) -- ++(0.25,0) -- ++(0,2) -- ++(-2.25,0) |- (Df1.pin 1);
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\draw (Df2.pin 4) -- ++(0.25,0) -- ++(0,2) -- ++(-2.25,0) |- (Df2.pin 1);
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\draw (Df3.pin 4) -- ++(0.25,0) -- ++(0,2) -- ++(-2.25,0) |- (Df3.pin 1);
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\draw (Df0.pin 6) -- ++(0.75,0) to[short,-*] ++(0,-0.75) coordinate (ck1) to[leDo, l_={$D_A$}] ++(0,-1.25) to[R, l_={$330 \Omega$}] ++(0,-1.5) node[ground]{};
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\draw (ck1) -| (Df1.pin 3);
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\draw (Df1.pin 6) -- ++(0.75,0) to[short,-*] ++(0,-0.75) coordinate (ck2) to[leDo, l_={$D_B$}] ++(0,-1.25) to[R, l_={$330 \Omega$}] ++(0,-1.5) node[ground]{};
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\draw (ck2) -| (Df2.pin 3);
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\draw (Df2.pin 6) -- ++(0.75,0) to[short,-*] ++(0,-0.75) coordinate (ck3) to[leDo, l_={$D_C$}] ++(0,-1.25) to[R, l_={$330 \Omega$}] ++(0,-1.5) node[ground]{};
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\draw (ck3) -| (Df3.pin 3);
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\draw (Df3.pin 6) -- ++(0.75,0) -- ++(0,-0.75) to[leDo, l_={$D_D$}] ++(0,-1.25) to[R, l_={$330 \Omega$}] ++(0,-1.5) node[ground]{};
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\end{circuitikz}
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\caption{Circuit Diagram of Assignment 3-3}
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\label{fig:a3-3-cd}
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\end{figure}
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\subsection{課題3-4}
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\cref{fig:a3-4-cd}の順序回路を組み, 動作を確認する. ? に適切な論理ゲートを使用する.
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\begin{figure}[H]
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\centering
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\begin{circuitikz}
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\ctikzset{logic ports=ieee}
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\ctikzset{logic ports/scale=0.75}
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\ctikzset{flipflops/scale=0.75}
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\ctikzset{resistors/scale=0.75}
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\ctikzset{diodes/scale=0.75}
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%\ctikzset{multipoles/flipflop/font=\tiny}
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\ctikzset{multipoles/flipflop/pin spacing=0.5}
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\node [flipflop D] at (0,0) (Df0){};
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\node [flipflop D] at (3,0) (Df1){};
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\node [flipflop D] at (6,0) (Df2){};
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\node [flipflop D] at (9,0) (Df3){};
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\node [european blank port] at ($(Df0.pin 3) - (0.25,0)$) (ckGate) {?};
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\node [nand port, number inputs=4, rotate=180] at ($(Df0) + (0,4)$) (nandGate) {};
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\draw (nandGate.out) -| (ckGate.in 1);
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\draw (-3.5,2) node[vcc]{$V_{DD}$} to[normal open switch, -*] ++(0,-2) coordinate (x) to[leDo, l_={$D_p$}] ++(0,-1.5) to[R, l_={$330 \Omega$}] ++(0,-1.5) node[ground]{};
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\draw (x) -- ++(0.75,0) |- (ckGate.in 2) (ckGate.out) -- (Df0.pin 3);
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\draw (Df0.pin 4) -- ++(0.25,0) -- ++(0,2) -- ++(-2.25,0) |- (Df0.pin 1);
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\draw (Df1.pin 4) -- ++(0.25,0) -- ++(0,2) -- ++(-2.25,0) |- (Df1.pin 1);
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\draw (Df2.pin 4) -- ++(0.25,0) -- ++(0,2) -- ++(-2.25,0) |- (Df2.pin 1);
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\draw (Df3.pin 4) -- ++(0.25,0) -- ++(0,2) -- ++(-2.25,0) |- (Df3.pin 1);
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\draw (Df0.pin 6) to[short,-*] ++(0.75,0) coordinate (AIN) to[short,-*] ++(0,-0.75) coordinate (ck1) to[leDo, l_={$D_A$}] ++(0,-1.25) to[R, l_={$330 \Omega$}] ++(0,-1.5) node[ground]{};
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\draw (ck1) -| (Df1.pin 3);
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\draw (AIN) |- (nandGate.in 1);
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\draw (Df1.pin 6) to[short,-*] ++(0.75,0) coordinate (BIN) to[short,-*] ++(0,-0.75) coordinate (ck2) to[leDo, l_={$D_B$}] ++(0,-1.25) to[R, l_={$330 \Omega$}] ++(0,-1.5) node[ground]{};
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\draw (ck2) -| (Df2.pin 3);
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\draw ($(BIN) + (0,2)$) node[not port, rotate=90](n1){} (BIN) -- (n1.in) (n1.out) |- (nandGate.in 2);
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\draw (Df2.pin 6) to[short,-*] ++(0.75,0) coordinate (CIN) to[short,-*] ++(0,-0.75) coordinate (ck3) to[leDo, l_={$D_C$}] ++(0,-1.25) to[R, l_={$330 \Omega$}] ++(0,-1.5) node[ground]{};
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\draw (ck3) -| (Df3.pin 3);
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\draw ($(CIN) + (0,2)$) node[not port, rotate=90](n2){} (CIN) -- (n2.in) (n2.out) |- (nandGate.in 3);
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\draw (Df3.pin 6) to[short,-*] ++(0.75,0) coordinate (DIN) -- ++(0,-0.75) to[leDo, l_={$D_D$}] ++(0,-1.25) to[R, l_={$330 \Omega$}] ++(0,-1.5) node[ground]{};
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\draw (DIN) |- (nandGate.in 4);
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\end{circuitikz}
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\caption{Circuit Diagram of Assignment 3-4}
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\label{fig:a3-4-cd}
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\end{figure}
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\subsection{応用課題 A}
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\Cref{sec:a3-3}で作成した4ビットカウンタにおいて, 最下位ビットのDフリップフロップのCKにパルスを印加した瞬間のそれぞれのビット出力の応答波形を観察する.
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