\section{実験手順・条件}

\subsection{実験器具}

\begin{itemize}
    \item{ブレッドボード}
    \item{直流安定化電源}
    \item{タクトスイッチ x4}
    \item{LED x4}
    \item{7セグメント LED}
    \item{カーボン抵抗器 $330 \Omega$ or $470 \Omega$ x12}
    \item{ジャンパーワイヤ}
    \item{ANDゲートIC TC74HC08}
    \item{NANDゲートIC HD14012BP}
    \item{ORゲートIC TC74HC32}
    \item{NOTゲートIC TC74HC04}
    \item{7セグメントドライバIC TC4511}
    \item{DフリップフロップIC TC74HC74 x2}
    \item{Nch MOSFET}
\end{itemize}

\subsection{課題1-1}

ANDゲートあるいはORゲートの動作を確認する.

2つのボタンを入力とし, 出力を7セグメントLEDのドットに表示させる回路を作成する.

\subsection{課題1-2}

4入力NANDゲートの動作を確認する.

4つのボタンを入力とし, 出力を7セグメントLEDのドットに表示させる回路を作成する.

\subsection{課題1-3}

\cref{fig:a1-3-cd}に示す組み合わせ回路を作成し動作を確認する.

4つのボタンを入力とし, 出力を7セグメントLEDのドットに表示させる回路を作成する.

\begin{figure}[tbh]
    \centering
    \begin{circuitikz}
        \ctikzset{logic ports=ieee}
        \node (A) at (0,2) {$A_{\text{IN}}$};
        \node (B) at (0,1) {$B_{\text{IN}}$};
        \node (C) at (0,0) {$C_{\text{IN}}$};
        \node (D) at (0,-1) {$D_{\text{IN}}$};

        \draw (2,1.5) node[and port](a){};
        \draw (2,-0.5) node[and port](b){};
        \draw (4.5,0.5) node[and port](c){};

        \draw (A) -| (a.in 1) (B) -| (a.in 2);
        \draw (C) -| (b.in 1) (D) -| (b.in 2);
        \draw (a.out) -| (c.in 1) (b.out) -| (c.in 2);
        \draw (c.out) -- ++(0.5,0) node[right] {$D_p$};
    \end{circuitikz}
    \caption{Circuit Diagram of Assignment 1-3}
    \label{fig:a1-3-cd}
\end{figure}

\subsection{課題1-4}

\cref{fig:a1-4-cd}に示す組み合わせ回路を作成し動作を確認する.

4つのボタンを入力とし, 出力を7セグメントLEDのドットに表示させる回路を作成する.

\begin{figure}[tbh]
    \centering
    \begin{circuitikz}
        \ctikzset{logic ports=ieee}
        \node (A) at (0,2) {$A_{\text{IN}}$};
        \node (B) at (0,1) {$B_{\text{IN}}$};
        \node (C) at (0,0) {$C_{\text{IN}}$};
        \node (D) at (0,-1) {$D_{\text{IN}}$};

        \draw (2,1.5) node[and port](a){};
        \draw (2,-0.5) node[and port](b){};
        \draw (4.5,0.5) node[and port](c){};
        \draw (6.5,0.5) node[not port](d){};

        \draw (A) -| (a.in 1) (B) -| (a.in 2);
        \draw (C) -| (b.in 1) (D) -| (b.in 2);
        \draw (a.out) -| (c.in 1) (b.out) -| (c.in 2);
        \draw (c.out) -- (d.in);
        \draw (d.out) -- ++(0.5,0) node[right] {$D_p$};
    \end{circuitikz}
    \caption{Circuit Diagram of Assignment 1-4}
    \label{fig:a1-4-cd}
\end{figure}

\subsection{課題2-1}

7セグメントドライバICを用いて1桁のBDCデコーダを作成する.

\subsection{課題2-2B}

論理ゲートを複数個使用し, 0-9以外の数の表現を実現する回路を作成する.
なお, 既存の0-9に対応するBDCコードが入力された際にはセグメントを点灯させないこと.

\subsection{課題3-1}

論理ゲートを組み合わせてRSフリップフロップを作成し, 動作を確認する.

\subsection{課題3-2}

DフリップフロップICを用いて\cref{fig:a3-2-cd}の回路を作成し, 動作を確認する.

\begin{figure}[tbh]
    \centering
    \begin{circuitikz}
        \ctikzset{logic ports=ieee}
        \ctikzset{flipflops/scale=0.75}
        \node [flipflop D] at (0,0) (Df){};
        
        \draw (-2.5,2) node[vcc]{$V_{DD}$} -- ++(0,-0.5) to[normal open switch] ++(0,-1.5) coordinate(x) to[leDo, l={$D_p$}] ++(0,-2) to[R={$330 \Omega$}] ++(0,-2) node[ground]{};
        \draw (x) to[short,o-] ++(1,0) |- (Df.pin 3);
        \draw (Df.pin 4) -- ++(0.5,0) -- ++(0,2) -- ++(-2.5,0) |- (Df.pin 1);
        \draw (Df.pin 6) -- ++(1.5,0) to[leDo, l={$D_A$}] ++(0,-2.5) to[R={$330 \Omega$}] ++(0,-2) node[ground]{};
    \end{circuitikz}
    \caption{Circuit Diagram of Assignment 3-2}
    \label{fig:a3-2-cd}
\end{figure}

\subsection{課題3-3}\label{sec:a3-3}

DフリップフロップICを2個用いて\cref{fig:a3-3-cd}の順列回路を作成し, 動作を確認する.

\begin{figure}[tbh]
    \centering
    \begin{circuitikz}[scale=0.9]
        \ctikzset{logic ports=ieee}
        \ctikzset{flipflops/scale=0.75}
        \ctikzset{resistors/scale=0.75}
        \ctikzset{diodes/scale=0.75}
        %\ctikzset{multipoles/flipflop/font=\tiny}
        \ctikzset{multipoles/flipflop/pin spacing=0.5}

        \node [flipflop D] at (0,0) (Df0){};
        \node [flipflop D] at (3,0) (Df1){};
        \node [flipflop D] at (6,0) (Df2){};
        \node [flipflop D] at (9,0) (Df3){};

        \draw (-2,2) node[vcc]{$V_{DD}$} to[normal open switch, -*] ++(0,-2) coordinate (x) to[leDo, l_={$D_p$}] ++(0,-1.5) to[R, l_={$330 \Omega$}] ++(0,-1.5) node[ground]{};
        \draw (x) -- ++(0.75,0) |- (Df0.pin 3);
        \draw (Df0.pin 4) -- ++(0.25,0) -- ++(0,2) -- ++(-2.25,0) |- (Df0.pin 1);
        \draw (Df1.pin 4) -- ++(0.25,0) -- ++(0,2) -- ++(-2.25,0) |- (Df1.pin 1);
        \draw (Df2.pin 4) -- ++(0.25,0) -- ++(0,2) -- ++(-2.25,0) |- (Df2.pin 1);
        \draw (Df3.pin 4) -- ++(0.25,0) -- ++(0,2) -- ++(-2.25,0) |- (Df3.pin 1);

        \draw (Df0.pin 6) -- ++(0.75,0) to[short,-*] ++(0,-0.75) coordinate (ck1) to[leDo, l_={$D_A$}] ++(0,-1.25) to[R, l_={$330 \Omega$}] ++(0,-1.5) node[ground]{};
        \draw (ck1) -| (Df1.pin 3);
        \draw (Df1.pin 6) -- ++(0.75,0) to[short,-*] ++(0,-0.75) coordinate (ck2) to[leDo, l_={$D_B$}] ++(0,-1.25) to[R, l_={$330 \Omega$}] ++(0,-1.5) node[ground]{};
        \draw (ck2) -| (Df2.pin 3);
        \draw (Df2.pin 6) -- ++(0.75,0) to[short,-*] ++(0,-0.75) coordinate (ck3) to[leDo, l_={$D_C$}] ++(0,-1.25) to[R, l_={$330 \Omega$}] ++(0,-1.5) node[ground]{};
        \draw (ck3) -| (Df3.pin 3);
        \draw (Df3.pin 6) -- ++(0.75,0) -- ++(0,-0.75) to[leDo, l_={$D_D$}] ++(0,-1.25) to[R, l_={$330 \Omega$}] ++(0,-1.5) node[ground]{};
    \end{circuitikz}
    \caption{Circuit Diagram of Assignment 3-3}
    \label{fig:a3-3-cd}
\end{figure}

\subsection{課題3-4}

\cref{fig:a3-4-cd}の順序回路を組み, 動作を確認する. ? に適切な論理ゲートを使用する.

\begin{figure}[tbh]
    \centering
    \begin{circuitikz}[scale=0.9]
        \ctikzset{logic ports=ieee}
        \ctikzset{logic ports/scale=0.75}
        \ctikzset{flipflops/scale=0.75}
        \ctikzset{resistors/scale=0.75}
        \ctikzset{diodes/scale=0.75}
        %\ctikzset{multipoles/flipflop/font=\tiny}
        \ctikzset{multipoles/flipflop/pin spacing=0.5}

        \node [flipflop D] at (0,0) (Df0){};
        \node [flipflop D] at (3,0) (Df1){};
        \node [flipflop D] at (6,0) (Df2){};
        \node [flipflop D] at (9,0) (Df3){};
        \node [european blank port] at ($(Df0.pin 3) - (0.25,0)$) (ckGate) {?};
        \node [nand port, number inputs=4, rotate=180] at ($(Df0) + (0,4)$) (nandGate) {};

        \draw (nandGate.out) -| (ckGate.in 1);

        \draw (-3.5,2) node[vcc]{$V_{DD}$} to[normal open switch, -*] ++(0,-2) coordinate (x) to[leDo, l_={$D_p$}] ++(0,-1.5) to[R, l_={$330 \Omega$}] ++(0,-1.5) node[ground]{};
        \draw (x) -- ++(0.75,0) |- (ckGate.in 2) (ckGate.out) -- (Df0.pin 3);
        \draw (Df0.pin 4) -- ++(0.25,0) -- ++(0,2) -- ++(-2.25,0) |- (Df0.pin 1);
        \draw (Df1.pin 4) -- ++(0.25,0) -- ++(0,2) -- ++(-2.25,0) |- (Df1.pin 1);
        \draw (Df2.pin 4) -- ++(0.25,0) -- ++(0,2) -- ++(-2.25,0) |- (Df2.pin 1);
        \draw (Df3.pin 4) -- ++(0.25,0) -- ++(0,2) -- ++(-2.25,0) |- (Df3.pin 1);

        \draw (Df0.pin 6) to[short,-*] ++(0.75,0) coordinate (AIN) to[short,-*] ++(0,-0.75) coordinate (ck1) to[leDo, l_={$D_A$}] ++(0,-1.25) to[R, l_={$330 \Omega$}] ++(0,-1.5) node[ground]{};
        \draw (ck1) -| (Df1.pin 3);
        \draw (AIN) |- (nandGate.in 1);
        \draw (Df1.pin 6) to[short,-*] ++(0.75,0) coordinate (BIN) to[short,-*] ++(0,-0.75) coordinate (ck2) to[leDo, l_={$D_B$}] ++(0,-1.25) to[R, l_={$330 \Omega$}] ++(0,-1.5) node[ground]{};
        \draw (ck2) -| (Df2.pin 3);
        \draw ($(BIN) + (0,2)$) node[not port, rotate=90](n1){} (BIN) -- (n1.in) (n1.out) |- (nandGate.in 2);
        \draw (Df2.pin 6) to[short,-*] ++(0.75,0) coordinate (CIN) to[short,-*] ++(0,-0.75) coordinate (ck3) to[leDo, l_={$D_C$}] ++(0,-1.25) to[R, l_={$330 \Omega$}] ++(0,-1.5) node[ground]{};
        \draw (ck3) -| (Df3.pin 3);
        \draw ($(CIN) + (0,2)$) node[not port, rotate=90](n2){} (CIN) -- (n2.in) (n2.out) |- (nandGate.in 3);
        \draw (Df3.pin 6) to[short,-*] ++(0.75,0) coordinate (DIN) -- ++(0,-0.75) to[leDo, l_={$D_D$}] ++(0,-1.25) to[R, l_={$330 \Omega$}] ++(0,-1.5) node[ground]{};
        \draw (DIN) |- (nandGate.in 4);
    \end{circuitikz}
    \caption{Circuit Diagram of Assignment 3-4}
    \label{fig:a3-4-cd}
\end{figure}

\subsection{応用課題 A}

\Cref{sec:a3-3}で作成した4ビットカウンタにおいて, 最下位ビットのDフリップフロップのCKにパルスを印加した瞬間のそれぞれのビット出力の応答波形を観察する.
