finished t-2

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2026-06-30 10:33:11 +09:00
parent 22e023438d
commit ccef343461
8 changed files with 111 additions and 13 deletions
+5 -3
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@@ -64,6 +64,8 @@
\includegraphics[width=4cm]{./assets/t-2/result/nand-4/state-1111.jpg}
\subcaption{$a = 1, \ b = 1, \ c = 1, \ d = 1$}
\end{minipage}
\caption{HD14012BP 4 Inputs NAND Gate ($x = \overline{a \cdot b \cdot c \cdot d}$)}
\label{fig:a1-2-res}
\end{figure}
\subsubsection{観測された真理値表}
@@ -537,19 +539,19 @@
\centering
\begin{minipage}[h]{0.45\textwidth}
\centering
\includegraphics[width=6cm]{./assets/t-2/result/signal-timing/first-second-bit.jpg}
\includegraphics[width=7cm]{./assets/t-2/result/signal-timing/first-second-bit.jpg}
\subcaption{First and Second Bits}
\end{minipage}
\begin{minipage}[h]{0.45\textwidth}
\centering
\includegraphics[width=6cm]{./assets/t-2/result/signal-timing/third-fourth-bit.jpg}
\includegraphics[width=7cm]{./assets/t-2/result/signal-timing/third-fourth-bit.jpg}
\subcaption{Third and Forth Bits}
\end{minipage}
\caption{Response Signals of Counter Output when State Transitions from 0 to 1}
\label{fig:aa-res}
\end{figure}
各出力がTC74HC74のHレベルの入力電圧に達するまでの時間を応答時間とし,
各出力がTC74HC74のHレベルの入力電圧に達するまでの時間を応答時間とし,
それぞれの応答時間の概算は\cref{tab:aa-res}となった.
\begin{table}[H]